This invention relates to a tape automated bonding(abbreviated to TAB) semiconductor device.
Since the invention of A. D. Aird disclosed in a U.S. Pat. No. 3,689,991 in 1972, TAB has been widely used in applications requiring chip connections beyond the capabilities of wire bonding.
In these heretofore known TAB semiconductor devices, a film carrier tape has sprocket holes for positioning, and device holes for placing semiconductor chips. A semiconductor chip is placed in each device hole.
A group of lead conductors are formed on the film carrier tape for each semiconductor chip. One end of each lead conductor of the group of lead conductors is connected to a bump on the semiconductor chip by inner lead bonding process (abbreviated to ILB). The opposite end of each lead conductor is terminated at a test pad on the film carrier tape. Probes of a test instrument come in contact with the test pads, and the properties of the semiconductor chip are tested.
The lead conductors of a semiconductor chip which is not rejected at the test, are cut off at outer lead bonding(abbreviated to OLB) lead holes provided in the film carrier tape surrounding the device hole.
In order to cover allowable positioning error in the test of the chip, the area of the test pad must be larger than a certain limit, and the spacing between adjacent test pads must be larger than a certain limit. For example, this spacing must be larger than 0.3 mm.
It becomes more difficult to meet these requirements when the total number of lead conductors connected to a chip becomes larger.
When a test pad is positioned at a distance from the chip, a large area may be allotted for the test pad. But this distance makes the length of the lead conductor long, and the longer lead conductor causes a larger conductor resistance which results in a larger signal delay.
In order to solve these problems, a special circuit board for testing has been proposed in a Japanese laid open publication Shou 62-46537. But, the bonding to the special circuit board for testing is troublesome, and does not solve any problem in TAB itself.
In a method introduced by Electronic Packaging & Production (1988 December pp 42.about.44), a grounding layer is formed on the back surface of the film carrier tape, and grounding leads of the lead conductors on the face of the film carrier tape are connected to this grounding conductor layer via through connections provided in the tape. This type of tape is called a two-metal-tape, as metal layers are formed on both sides of the insulator film, and is helpful for impedance matching of lead conductors.
In order to reduce the total number of lead conductors and that of test pads, however, a multi-metal-tape is required, and it is not practical to provide more than two metal layers in this configuration.
A TAB semiconductor chip is connected to a printed circuit board using bonding pads provided on the printed circuit board. The ends of the lead conductors of the TAB semiconductor chip are aligned on corresponding bonding pads and temporarily fixed by adhesive force of solder paste which is pasted on the bonding pads. Then, the printed circuit board with semiconductor chips is put in a reflow oven to melt the solder of the solder paste. After the melted solder is cooled and solidified, the lead conductors remain connected to the bonding pads.
For this process of OLB, co-planarity of tile surfaces of the lead conductors is important. Heretofore known TAB semiconductor devices do not have sufficient co-planarity of the lead conductor surfaces.
The TAB lead conductors are made of Cu family of 35 .mu.m thickness, and have inferior mechanical strength compared with conventional lead conductors made of Fe, Ni family of 125 .mu.m thickness. The TAB lead conductors are supported by a suspender made of insulator frame. But the suspender itself is a polyimide film of about 125 .mu.m thickness and the reinforcement by the suspender is not sufficient, and often the suspender becomes warped and impairs the co-planarity.